Dr. Narasimha Bhat founded Manipal Dot Net Pvt. Ltd to foster a culture of innovation and hi-tech work. Previously, Dr. Bhat was R&D Director at Synopsys Inc, USA, a world leader in Electronic Design Automation. He was the Managing Director of the Manipal R&D site of Synopsys, where he set up unique university collaborations with NITK, Surathkal, and MAHE, Manipal. Prior to Synopsys, he was a Technical Leader at AT&T Bell Laboratories, Murray Hill, NJ. Dr. Bhat holds a Ph.D. in EECS from U.C. Berkeley, an M.E. in ECE from the Indian Institute of Science, Bangalore, and a B.E. in E&C from the Manipal Institute of Technology, Manipal. He can be reached by email at narasim@manipal.net.

Dr. Vinay Kumar has been a Member of Director of Research at Manipal Dot Net since November 2006. His areas of expertise include Computer Vision and Image Processing, Pattern Recognition, Machine Learning, Artificial Intelligence, Linear Algebra, and hardware acceleration of computationally intensive tasks on FPGAs and GPUs.

At MDN, he has contributed to several technically challenging projects:

• Design of Parallel algorithms for multi-plane image reconstruction, a computationally intensive task in X-ray fluoroscopy in the domain of bio-medical imaging. These algorithms have been implemented on NVIDIA GPUs using CUDA.
• Developed object detection techniques using OpenCV, which are resilient against object scaling and rotation.
• Design of Real-time Fish Eye Correction Algorithms, and implementation on FPGA and soft-core programmable
processors.
• Design and FPGA implementation of Automatic License Plate Recognition system.

Dr. Vinay holds a PhD in Brain and Cognitive Sciences from the Massachusetts Institute of Technology, Cambridge, MA (MIT); a MS in Electrical and Computer Engineering from Northeastern University, Boston, MA; and a B.Tech. in Electrical Engineering from Indian Institute of Technology, Bombay, India. He has authored about 15 international publications.

Dr. Vinay has worked as a Bio-Imaging Engineer at Aureon Biosciences Corp, NY, USA; as a Machine Vision Consultant at E-Governments Foundation, Bangalore; a Pattern Analysis Consultant at Mapunity Information Services, Bangalore; a summer intern at AT&T Research Labs, and has been a Teaching Assistant for various courses at MIT.

Dr. Prashanth Bhat is Chief Technology Officer at Manipal Dot Net. He brings over a decade of international quality research, experience and exposure in computer systems and software development. His areas of expertise include Internet search engine technology, parallel and distributed high performance computing, embedded systems, logic design and FPGAs.

Most recently, he was a Research Engineer at Yahoo! Research, Santa Clara, where he architected some of the key components of Yahoo!'s next generation 'Contextual Match' advertising infrastructure. Prior to this, he worked with Yahoo! India's Advanced Technology Group, developing a distributed systems platform for Machine Learning applications. He has worked on the core technology of Web Search engines for over six years, during his tenures at Yahoo! Inc (USA), Overture Services, and Alta Vista Search. As a summer intern at HP Research Labs, Palo Alto, he developed new process scheduling techniques for HP's high-end parallel servers.

Dr. Prashanth Bhat graduated with a PhD in Computer Engineering from the University of Southern California, Los Angeles, a M. E. in Computer Science and Engineering from the Indian Institute of Science, Bangalore and B. Tech in Computer Engineering from KREC (now NITK) Surathkal. He was awarded the Dr. T.M.A. Pai Gold Medal from Mangalore University. He also secured the 5th rank in the 12th standard, in the state of Karnataka. He won the Best Technical Presentation awards at both graduate and undergraduate levels, and the Best C Programmer award during his undergraduate studies.

During his graduate research at USC, he developed analytical models of high performance parallel systems and distributed heterogeneous systems. He proposed new scheduling algorithms for interprocessor communication, using techniques from Operations Research and Shop Scheduling. These models and scheduling techniques were applied towards enhancing the run-time performance of high-end signal processing applications.

He holds 2 US patents and has authored about 15 international publications. He served as Industrial Track Chair at the International Parallel and Distributed Processing Symposium (IPDPS) 2001, and has been a reviewer for JPDC, IPPS, ICPP, Proceedings of the IEEE and Supercomputing Conference. He has taught courses in Parallel Computing and Digital Design. He can be reached by Email at prashanth.bhat at manipal.net.

Srikanth has over 15 years of experience in design and implementation of circuits and boards for demo systems, development platforms and evaluation systems including a key role in developing the Freescale Tower from concept to a production ready package.

At Zeta Infotech, Srikanth led the remote site setup and administration activities as an Executive Director and also made significant contribution in the area of Logic design/corner cases analysis as a Sr. R&D Engineer. Prior to that he has worked as a Teaching Faculty in E&C Dept of NITK Surathkal and MIT Manipal for various courses.

Srikanth has MTech degree in Industrial Electronics from NITK Surathkal and a B.Tech from MIT Manipal, Mangalore University.

Mr. Nagaraja comes with diverse and rich experience in multiple domains Software Development and Product Manager of various products like FPGA synthesis software, Embedded/System Software products, FPGA IP Design, Application Engineering and Quality Assurance. Previously, Mr. Nagaraja was R&D Manager at Synopsys Inc, India, a world leader in Electronic Design Automation. He was also the R&D Manager at Zeta Infotech Pvt. Ltd(Manipal R&D site of Synopsys), Manipal. Mr. Nagaraja holds a M. Tech. in Industrial Electronics from NITK, Surathkal(formerly known as REC, Karnataka) and B. E. from JNNCE, Shimoga(Mysore University). He can be reached by Email at nraj at manipal dot net.

Mahadeva Mardithaya has more than 30 years of experience in software engineering and has held various technical positions in reputed multinational organizations. Before joining Manipal Dot Net Private Limited as senior member of technical staff in 2011, he was a senior manager of software development at Symantec Corporation, Mountain View, CA, USA. He has managed software product development projects from concept to release across geographically distributed teams. He has extensively used agile software development processes and object oriented design methodologies in various software projects.

He holds a B.E. degree from Mysore University and is a first rank holder for Electronics and Communications Engineering for the University. He is also a Project Management Institute certified PMP (Project Management Professsional).

Steevan has done his Bachelor of Engineering in E&C and MTech in Microelectronics from NITK Suratkal (formerly KREC). Steevan has 11 years of experience in software quality assurance and development. Prior to joining MDN he worked as assistant Lecturer at NITK Surathkal.

Steevan currently handles DVR and IPCamera firmware support and he also works on hadoop technology based solutions. He can be reached by Email at steevan.rodrigues at manipal.net

Vinayak has done his Bachelor of Engineering in E&C from SJCE, Mysore and MS in CAD for VLSI from MCIS, Manipal. Vinayak has 18 years of experience in FPGA designing for image and video processing, networking and ultra low power FPGAs. Prior to joining MDN he has worked as Design Engineer at CoreEl Programmables, Bangalore.

Vinayak currently handles FPGA designing for Multigigabit Automotive Ethernet Test and Visibility solution. He can be reached by Email at vinayak.nayak at manipal.net

Manjunath has 11 years on experience in diverse fields ranging from RTL design, HW Graphics Pipeline, Image processing, embedded systems, SIMD optimizations, High Level Synthesis, porting machine learning solutions to various platforms, AWS etc. Prior to joining MDN, he has worked at Intel India as Graphics HW Engineer and at Pathpartner Technologies as Senior Technical Lead. Manjunath holds M.Tech in Electronics Systems Engineering (formerly CEDT) from IISc, Bengaluru and B.E in E&C from SJCE, Mysuru.

Manjunath currently handles remote monitoring based solutions. He can be reached at manjunath.kulkarni@manipal.net.